SMC Networks SMC91C95 Manuel d'utilisateur télécharger pdf (Page 38)

Table 9 - Internal I/O Space Mapping

BANK0 BANK1 BANK2 BANK3 BANK4 BANK5

0 TCR CONFIG MMU

COMMAND

MT0-MT1 ECOR

(low byte)

ECSR

(high byte)

MCOR

(low byte)

MCSR

(high byte)

2 EPH

STATUS

BASE PNR ARR MT2-MT3 PRR

(low byte)

4 RCR IA0-IA1 FIFO PORTS MT4-MT5 EBASE0

(high byte)

IOEIR

(low byte)

MBASE0

(high byte)

6 COUNTER IA2-IA3 POINTER MT6-MT7 EBASE1

(low byte)

MBASE1

(low byte)

8 MIR IA4-IA5 DATA MGMT Msize

(high byte)

A MCR GENERAL

PURPOSE

DATA REVISION

C RESERVED

(0)

CONTROL INTERRUPT ERCV

E BANK

SELECT

BANK

SELECT

BANK

SELECT

BANK

SELECT

1 2 ... 33 34 35 36 37 38 39 40 41 42 43 ... 138 139

SMC91C95 1
TABLE OF CONTENTS 2
Related Documentation 2
128 Pin VTQFP 3
GENERAL DESCRIPTION 4
OVERVIEW 4
PIN REQUIREMENTS 7
DESCRIPTION OF PIN FUNCTIONS 10
FUNCTIONAL DESCRIPTION 21
TX COMPLETION 26
RESET LOGIC 33
THEORY OF OPERATION 69
“Magic Packet” Support 70
FIGURE 12 - RX INTR 75
FIGURE 13 - TX INTR 76
FIGURE 14 - TXEMPTY INTR 77
OPERATIONAL DESCRIPTION 104
FIGURE 20 - I/O READ TIMING 110
(Table on the following page) 110
POWERDOWN 118
FIGURE 36 - EEPROM READ 127
FIGURE 37 - EEPROM WRITE 128
FALLING RXCLK) 130
GAGE PLANE 136
300 Kennedy Drive 138
Hauppauge, NY 11788 138
(516) 435-6000 138
FAX (516) 231-6004 138

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SMC Networks SMC91C95 Manuel d'utilisateur Page 38

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